Signal integrity from simulation to measurement
by Signal integrity
Translated by Hualink RF Sunny Li
Data centers use channels between transmitting and receiving systems to deliver valuable information accurately and efficiently. Poor channel performance can lead to signal integrity problems and affect the correct interpretation of the transmitted data. Therefore, ensuring a high degree of signal integrity is critical when developing channel devices and interconnect products. Testing, identifying and resolving the root causes of equipment signal integrity problems is a huge challenge for engineers. This article presents some simulation and measurement recommendations designed to help you design equipment with excellent signal integrity.
The central processing unit (CPU), which sends information to a light-emitting diode display, is a typical example of a digital communication channel. This channel-all the media between the CPU and the display-includes interconnecting devices, such as graphics cards, cables, and onboard video processors. Each device and their connection in the channel can interfere with the CPU's data transfer.
Signal integrity problems may include crosstalk, delay, ringing, and electromagnetic interference. Addressing signal integrity issues early allows engineers to develop high-performance products that are more reliable and help reduce costs.
Channel simulation
Engineers typically create circuit simulations using electronic design automation software.
The design automation software uses bit-by-bit and statistical simulation techniques to provide fast and accurate channel simulation.
Algorithmic modeling interface is a standard used by design software, which can easily simulate multi-gigabit serial links from transmitting to receiving.
In addition to simulation software, engineers use signal analysis tools such as eye maps, mixed-mode S-parameters, and time-domain reflectometry.
When simulating data transmission from transmitter to receiver, the eye map displayed on the oscilloscope can be used as an analysis parameter to help evaluate channel performance.
The width and height of eye map are the key indicators of signal distortion.
A wide eye map means good data transmission.
Closed eyes show a significant reduction in signal integrity.
If the eye pattern at the transmitter is open and the eye at the receiver is closed, the next step is to determine which devices or interconnections in the channel are causing the signal attenuation.
Engineers can look directly at the eye pattern at the transmitter's output and trace it back to the receiver through each interconnection to identify components that are causing signal attenuation.
Figure 1：Examples of closed and normal eye pattern
Determine the root cause of signal attenuation
Engineers can use the S-parameter as a standard for describing the frequency characteristics of a given device.
The S-parameters of interconnection (whether measured in the time domain or in the frequency domain) represent the characteristic model of interconnection.
This parameter covers all characteristic information about a signal from the time it enters one port to the time it leaves another port.
To determine the root cause of signal decay, it is important to first determine your expected value of the S parameter.
Comparing the expected value with the measured value helps to identify channel regions that cause signal integrity to decay.
Next, you need to delve more deeply into the device under test and the connection between the devices in order to determine the root cause.
For differential channels, the mixed mode S parameter can be used for analysis.
The most common S parameters are differential return loss (SDD11), differential insertion loss (SDD21) and differential to common-mode conversion (SCD21) related to electromagnetic interference.
The reflection factor also needs to be considered when analyzing the transmission quality.
The signal is reflected whenever there is a transient impedance change.
Reflection delays the return of the original signal (as shown in Figure 2 below) and combines with the original signal to produce interference.
Figure 2：The effect of reflection on signal quality
Explore and design signal integrity solutions
Once you have initially identified the root cause of signal attenuation, you need to investigate and determine the best solution.
First, perform simulation tests after removing design defects to verify that you have indeed found the root cause of signal integrity decay.
Our suggestion is that, rather than removing problematic areas as a solution, we try to add equalization on the receiver, for example by adding decision feedback equalization（DFE）Continuous time linear equalization in frequency domain or transmitter feed forward equalization in time domain.
Similarly, you can add equalization through simulation to test whether the equalization has solved the problem of signal integrity attenuation by observing changes in the eye pattern in real time on an oscilloscope.
As shown in Figure 3, another test option is to apply the eye map template before and after adding equalization.
Before adding equalization, the image intersects, which means the eye image is closed.
After adding equalization, the images no longer intersect, indicating that the eye map is open.
Figure 3：Before and after using DFE
Signal Integrality Analysis
As product design moves from simulation to hardware, you need to use vector network Analyzer (VNA) to test high-speed digital interconnections.
First, you need to understand the expected measurements for channels, physical layer devices, connectors, cables, backplanes, or printed circuit boards.
After the actual measurement results are obtained, the actual results are compared with the expected results.
Our goal is to establish a reliable signal integrity workflow through both software and hardware.
Hardware measurement steps include instrumentation measurement setup, obtaining channel data, and analyzing channel performance.
For high dynamic range instruments such as vector network Analyzer (VNA), you need a thorough understanding of error correction to ensure the most accurate MEASUREMENT of S parameters.
Error correction includes calibration (error correction before measurement) and de-embedding (error correction after measurement).
Check all node items in the channel except DUT by adjusting calibration and de-embedding reference points.
The following describes the difference between calibration and de-embedding error correction and how to use them.
Signal Calibration
By default, when the Vector Network Analyzer (VNA) is turned on, its reference plane is located on the front panel.
When the cable is connected to the equipment under test, the calibration reference must use the short-circuit-open-load-straight-through method (SOLT), straight-through reflection or straight-through reflection matching reference structure.
SOLT is the most common approach.
The cable can be connected directly to the DUT or fixture.
The jig is installed between the cable and the DUT, helping to accommodate different types of connectors, such as HDMI, display port, Serial ATA, and PCI Express.
In this example, the calibration reference surface includes the cable, and the de-embedding reference surface includes the fixture.
When calibration error correction and de-embedding are combined, all interconnections to the DUT in the channel must be included.
After connecting the DUT, you can make measurements and perform post-measurement (de-embedding) error correction.
Figure 4：Test Settings for calibration using reference surfaces
De-Embedding
To complete the measurement, set the input and output of the DUT to embed the reference points in order to remove the test fixture.
After removing the test fixture, the loss and reflection introduced into the system are removed, and the accurate MEASUREMENT and characterization results of S parameters of DUT are finally obtained.
By comparing the s-parameter results of two levels of calibration (calibration and de-embedding) with the expected results, you can adjust the model to match the actual measurements and then proceed with device development.
Figure 5：Test setup for de-embedding using reference surfaces
Overcome signal integrity issues
With the increase of data transmission speed, signal integrity is becoming more and more important for channel equipment and interconnect products.
To ensure that your device has excellent signal integrity, first determine the simulation results you want and then compare them with actual measurements.
Next, combining signal analysis techniques (such as eye images displayed on an oscilloscope) with simulation software, the root cause of signal attenuation can be identified.
The next step is to determine the appropriate solution, using software and hardware to establish a reliable signal integrity workflow.
A high quality Vector network Analyzer (VNA) must be used, the calibration reference surface must be set up to perform the S-parameter measurement, and the reference surface must be set to de-embed to remove the fixture correctly.
The measurement results will include accurate S parameters and reliable DUT characteristics.
By addressing signal integrity issues early, you can optimize circuit design for superior equipment performance and superior pricing.
